About the Quiz:

This quiz is based on all the real time scenarios we face in our work as a Layout Engineer . All the  questions are based around " What? Where? When? Why? How? "the real-time scenarios . It tests your skill of Layout design and Physical Verification , checking on , How well you understand your Job role .It is  tailored to all levels of experience for Analog IC Layout Engineers and physical Verification Engineering  . It would give them a better understanding of what they have been working so far. It would trigger them and channelize to prepare for technical interviews or even gauge them self of where they stand technically.  

Who can Benefit from this Quiz?

- Working Professionals who would want to enhance their skill in profiles like (ASIC design, Analog Circuit Design, Analog IC layout Design, Physical Design, Physical Verification, Standard cell Layout     Design, Analog Layout Design, Memory Layout Design & IO Layout Design).

- Undergrad students, Master's Tech Students, PHD candidates, Faculties, technology enthusiasts, Job seekers, it would help in interview preparation