About the Quiz:

This quiz is tailored for junior to mid level experienced professionals working in physical Verification ,Analog IC Layout  , and Physical Design Engineering roles . Focusing ONLY of Physical Verification aspects .It would give them a better understanding of what they have been working so far.triggering them and channelize to prepare for technical interviews or even gauge them self of where they stand technically.  There is lot more to learn than just doing Layouts and fixing few DRCs / LVS issue.

Note: There are few questions which have multiple correct answers , pelase read the question carefully .

Who can Benefit from this Quiz?

- Working Professionals who would want to enhance their skill in profiles like (ASIC design, Analog Circuit Design, Analog IC layout Design, Physical Design, Physical Verification, Standard cell Layout     Design, Analog Layout Design, Memory Layout Design & IO Layout Design).

- Undergrad students, Master's Tech Students, PHD candidates, Faculties, technology enthusiasts, Job seekers, it would help in interview preparation