About the Course :

In this self paced sessions , you would be learning the concepts of ASIC Parasitic Extraction in Detail . Its significance and the Flows . This course would help you to understand Parasitic extraction in depth and not just  click few buttons and dump a parasitic file .There is a lot more to Parasitic Extraction , which goes in the background . Every setting done by the CAD / Enablement team impacts the way the execution of the rule from the Foundry .  Making you understand the concepts and giving you the tips and tricks based on our experience  to help you do your Job better / adding to your skill set . 

Who can Benefit from this course?

- Working Professionals who would want to enhance their skill in profiles like (ASIC design, Analog Circuit Design, Analog IC layout Design, Physical Design, Physical Verification, Standard cell Layout     Design, Analog Layout Design, Memory Layout Design & IO Layout Design).

- Undergrad students, Master's Tech Students, PHD candidates, Faculties, technology enthusiasts, Job seekers, it would help in interview preparation

- Things what you learn in this session, would help you improve the quality of work what you deliver. 

- Candidates who are hungry for Knowledge and would want to know the Whole ASIC implementation. 

The topics covered are as below :

- What is Parasitic Extraction ?

- Why is Parasitic Extraction needed ?

- Parasitic Extraction Flow 

- Parasitic Extraction Background Process

- R, C, RC, RCC type of Extractions

- Parasitic Models

- Selective net parasitic Extraction

- Parasitic netlist reduction Techniques

- Parasitic FILL Handling

- Black Box and Gray Box Extraction 

- Types of Parasitic Extractions